In this project a Low-Dropout (LDO) voltage regulator is proposed with efficient two-stage error amplification technique. This two-stage single output error amplifier provides an accurate reference voltage differentiation to the power transistor stage. The proposed LDO regulator has a minimum dropout voltage of 157mV with input voltage of 1.8V. The proposed circuit is designed using 180nm CMOS technology and consumes the power of 14mW.