A multiplier /divider circuit using a single Current Differencing Buffered Amplifier (CDBA) is designed. It is possible to simultaneously realize a multiplier and a divider without changing the circuit configuration. It has flexibility and simplicity in designing the circuit. It is free from the effect of parasitic capacitances and appropriate for high frequency operation whose range is more than 100 MHz. The proposed structure is designed for implementing in 180-nm CMOS technology in cadence virtuoso environment. The power consumption and the bandwidth of the designed circuit are 45.67μw and 83.6 MHz respectively.